Education
B.S. Electrical and Computer Engineering
University of Waterloo, 2022
Experience
Tesla Inc. - Staff Silicon Design Engineer
August 2025 - Present | Palo Alto California, USA
- Building next-generation DOJO D3 silicon, focusing on scale-up and scale-out domain architecture across die, rack, and cluster
- Explored scale-up options including NVLink, THU, Google's Torus, and AMD's RoCE
- Own boot architecture for AI6 across boot sequence, NoC, CPU, Ethernet, UFS, and related subsystems
- Building a chip to improve FSD and Optimus
- Taped out two chips, brought up systems, and validated designs; prototyped critical paths in FPGA and ran production workloads until silicon returned
- Worked with Samsung and TSMC foundries on dual-foundry tape-out, developing process-specific ECOs and parallelizing boot and related block delivery to support a 9-month design cycle
Tesla Inc. - Senior Silicon Design Engineer
February 2024 - August 2025 | Palo Alto California, USA
- Developed the proprietary Tesla Transport Protocol (TTP) over Layer 3 congestion-aware protocol enabling low-latency, high-throughput communication across DOJO die to die fabric in RTL
- Brought design of TTP from design phase to tape-out ready in next generation DOJO Z2
- Designed TTP RDMA systems on next generation DOJO silicon incorporating Scale Up Ethernet (SUE) with L3/L4 routing
Tesla Inc. - DOJO Hardware Engineering
July 2022 - February 2024 | Palo Alto California, USA
- Led design of custom high-density compute cluster integrating NICs to enable TTP-based communication using PCB design and helped with FPGA design
- Brought up DOJO interface card NIC and FZ1 (compute-die interfaces) in production, developing front-end back-end Node.js tools for hardware tracking and diagnostics, and performing signal integrity and hardware debugging
- Wrote RTL enabling microcontroller access to internal buses as well as hostless hardware control
- Designed hardware and brought up production line for high power AC to DC conversion for DOJO cabinet power rails
Tesla Inc. - DOJO Hardware Intern
August 2021 - December 2021 | Palo Alto California, USA
- Tested high-speed interface cards for mesh network and fabric communication containing 100G QSFP and high speed SERDES interfaces achieving TB/s throughput, alongside high-density power supply units
- Engineered a supercapacitor hot-swap controller, enabling seamless hardware insertion into a live cabinet, thus promoting operational convenience and safety
- Engineered next generation DOJO cabinet controller with wide array of IOs and infrastructure controllers
- Brought up Tesla's first-generation DOJO cabinet with compute nodes and power supply units
- Effectively tested and integrated a large, complex system comprising intricate harnessing, control systems, and high-power delivery, ensuring overall system coherence and performance
Tesla Inc. - Autopilot Hardware Engineering Intern
January 2021 - May 2021 | Palo Alto California, USA
- Wrote hardware validation testing suites for the team including Ethernet Switch, GPS, VRM bring-up in Python to reduce repetitive tasks and build software infrastructure
- Identified, investigated, and rectified reliability issues prevalent on the AutoPilot board in temperature-varying environments, enhancing overall system robustness
- Performed time-domain reflectometry on SGMII and 1000Base-T1 signal paths to verify signal integrity and performed eye-diagram analysis for intersymbol distortion
- Validated multi-phase buck converter load transient step response and open-loop phase response; meeting requirements
University of Waterloo - Undergraduate Research Assistant
April 2020 - August 2020 | Waterloo Ontario, Canada
- Engineered a digital signal processing 60GHz mmWave radar system specifically for non-contact vital sign detection, pushing the boundaries of health technology tracking patients in hospitals
- Devised a sophisticated algorithm utilizing digital signal processing, wavelet transformation, and auto-correlation, proficient in detecting breath rates at distances of up to 10 meters, showcasing innovation in remote vital sign detection
- Established a client-server architecture in Python and C++, designed to seamlessly offload processing in real-time, thereby enhancing system performance and efficiency
Kazoo Technology - Electronics Designer and Innovator Intern
August 2019 - April 2020 | Hong Kong, Hong Kong
- Leveraged fundamental engineering principles and the scientific method to reverse engineer capacitive touchscreen stylus hardware. Successfully devised and validated theories through comprehensive simulations, verified by the construction of a hardware prototype
- Reverse engineered capacitive touch screen stylus hardware to adapt technology to special use case
- Designed both discrete and integrated analog amplifiers as well as digitally controlled filters, leveraging LTSpice simulations and progressing to building and testing physical prototypes.
- Designed 200 MSPS ADC with FPGA dev-board in Altium including touch screen protocol detection and spoofing to mimic touch screen touching as well as to provide geometry that the touch device can detect
AR Modular RF - Radio Frequency Hardware Engineering Intern
January 2019 - April 2019 | Seattle Washington, USA
- Developed and implemented automated RF amplifier testing infrastructure using LabView and Python, significantly reducing test cycle times and improving measurement consistency
- Architected and deployed a scalable MAC address management system for IP-enabled products, including firmware flashing automation and database tracking
- Characterized RF products to convey technical specs and information to the marketing department and datasheets
Evertz Microsystems - Systems Engineering Intern
May 2018 - August 2018 | Burlington Ontario, Canada
- Executed research and deployed strategies for impedance and phase matching of 25G QSFP differential pairs, significantly enhancing signal integrity
- Successfully captured schematics for an Ethernet switch encompassing RGMII, 1000BTX, and SGMII, including the incorporation of magnetics and impedance matching for optimal performance
- Engineered specialized firmware to identify incoming video encryption streams, further enhancing user interaction
Evertz Microsystems - Systems Engineering Intern
September 2017 - December 2017 | Burlington Ontario, Canada
- Developed FPGA firmware for capturing and replaying 10GB/s fiber optic layer 2 ethernet packets with realtime hardware time stamping for replaying at a different time for testing purposes
- Designed and implemented a DDR3 circular buffering system, implemented pre-fetching and caching, while also supporting DMA to DDR3, allowing generation of Wireshark files from Ethernet captured frames
- Troubleshot hardware short-circuits on high-density PCBs and spearheaded the design of a more robust active fusing system to safeguard boards against potential damage
Dozr - Fullstack Software Engineering
January 2017 - April 2017 | Kitchener Ontario, Canada
- Developed React components utilizing advanced state management patterns and custom hooks, significantly improving website UI, and internal tooling for managing user data
- Built and optimized a distributed web crawling system using Node.js and Python, implementing intelligent rate limiting and parallel processing
Skills
Note: I think these sections are silly, but everyone seems to have one. Here is a *mostly* honest overview of my skills.
Selected Courses
ECE 260:
Electromechanical Energy Conversion
•
ECE 316:
Probability Theory and Statistics
•
ECE 318:
Communication Systems 1
•
ECE 327:
Digital Hardware Systems
•
ECE 331:
Electronic Devices
•
ECE 373:
Radio Frequency and Microwave Circuits
•
ECE 375:
Electromagnetic Fields and Waves
•
ECE 380:
Analog Control Systems
•
ECE 444:
Analog Integrated Circuits
•
ECE 445:
Integrated Digital Electronics
•
ECE 475:
Radio-Wave Systems
•
ECE 488:
Multivariable Control Systems
•
CS 229:
Machine Learning
